MCP (Multi Chip Package) includes two or more chips encapsulated inside, wire-connecting these chips and a substrate to work as the base of the package.  It is provided in two structures: one has chips vertically positioned or stacked; and the other has chips positioned side by side.

<MCP's Advantages>

• Connecting and encapsulating multiple chips of different functions in a single package, MCP allows more surface mount area on appliances and devices. In particular, by employing this advanced chip stacking technology, surface mount area on compact electronic devices such as mobile phones and digital camera is effectively used.
• MCP enables best-suited chip combination for specific purposes and applications, allowing efficient product development, and accelerating the time to market.

Two or more different LSIs are separately packaged and tested, and thereafter those packages are combined in a stacking manner and assembled again into PoP packages.  PoP enables smaller surface mount area or footprint as well as shorter wire length.

News release from Elpida Memory, Inc. (June 22, 2011)

<PoP's Advantages>

• Stacking multiple packages allows more surface mount area available and enables smaller electronic appliance/device.
• Packages can be separately tested, which enables reduction in yield losses.
• Wire length is shortened, thereby minimizing the impact of reflection and noise possibly caused when memory and ASIC chips are combined.
• By only changing chips to stack, upgrades such as memory capacity increase are easily performed,  thereby enabling significant reduction in development cost and time.

SiP includes an entire system in its single package body.  It is similarly structured to MCP in that multiple chips are wired-bonded to a substrate to work as the base of the package and are encapsulated in a single package.

<SiP’s Advantages>

• In the past, CPU and RAM/ROM used to be separately assembled on a printed circuit board for system building.  Now that SiP is employed, these items are all consolidated into one package.  This enables significant reduction in surface mount area or footprint on appliances and devices.
• Even when compared with SoC, SiP is far advantageous in development cost and production time reduction.