SiP includes an entire system in its single package body, having a similar structure to that of MCP, wherein multiple chips are encapsulated in a single package, and are wire-bonded to the substrate which works as the base of the package.

Conventionally, the system is built by mounting semiconductor devices such as CPU, and RAM/ROM individually on the printed circuit; however, now SiP packages those into a single body, contributing significantly to reduction in mounting space on the devices/appliances. When compared to SoC, SiP is much more beneficial in cost and time for the development. Akita Elpida offers best-suited SiP system solutions for the customers' applications and contributes to the total cost reduction they pursue.

Technology

Critical points of SiP

• Substrate design
  signal/power integrity and critical path
• Testing
  Separate test for Logic, Memory, RF, etc.
• KGD device
  Mutual understanding and communication for KGD supply
• Thermal issue
  Verification and feedback by thermal simulation

Comparison in Characteristics of SiP/MCP Packages

Sip package Structure	Mix number of package	Small	Thin	Thermal resistance	Reliability	Test	Yield	Flexibility of memory type	Total cost
QFP	1	fair	fair	good	better	better	good	fair	better
Chip stack	1	better	better	good	better	good	good*1	fair	better
Side by side	1	fair	good	better	better	good	good	fair	good
Package on Package	2	fair	good	good	good	good	better	better*2	good
Package in Package	2	good	good	fair	good	fair	better	good	better

Fair < good < better

*1.Akita's process optimization and yield improvement technologies can increase total product yield further to such level as to win the "very good" mark.
*2.Memory for use as the top package can be changed easily depending on needs after specifications of connection between the top and bottom packages are prepared.