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Technologies | TSV (Through Silicon Via)

TSV is a 3-dimensional stack packaging technology for electrical connection of multiple chips stacked in a sandwiched manner by making small through holes in the chips and filling metal in them.

Compared with the conventional method to wirebond multiple chips, this technology significantly reduces wiring distance, bringing out big advantages in terms of speed, power reduction, and compactness.

Akita Elpida has joined in the development project Elpida Memory started in 2004 with the grant from NEDO (New Energy and Industrial Technology Development Organization), achieving 9-layered 8Gbit DDR3 DDRAM consisted of eight 1GBit DDR3 SDRAM dies and one interface layer.

News release from Elpida Memory, Inc. (August 27, 2009)

8-Gigabit TSV DRAM Package Outline & Cross-section

Compared with the conventional manner, where wire is used to connect the electrodes when stacking chips, TSV enables dramatic reduction of the wiring distance due to the significant increase in the number of the electrodes, thus enhancement in the process speed and energy saving function being greatly expected.

Furthermore, the TSV enables functional enhancement when combined with logic semiconductors. By stacking and packaging DRAM and other chips together and offering as a single product, TSV has the similar functions as LSI (Large Scale Integration) wherein various circuits are processed on a single chip, and yet achieves extensive functional enhancement rather than squeezing multiple circuits into a single chip.